NEUROTEC II - Neuro-inspired artificial intelligence technologies for the electronics of the future in the Rhineland
The collaborative project NEUROTEC II follows on seamlessly from the predecessor project NEUROTEC and explores a technology of neuro-inspired electronics for artificial intelligence based on memristive devices. NEUROTEC II combines the expertise of researchers from Forschungszentrum Jülich (FZJ), Rheinisch-Westfälische Technische Hochschule Aachen University (RWTH) and Gesellschaft für Angewandte Mikro- und Optoelektronik GmbH (AMO). Circuits for neuromorphic computing (NC) using memristive devices are considered to have significant potential for future information technology. NC is expected to produce significant improvements in computing speed and energy efficiency. However, no established industrial process lines exist yet for their realization and their interconnection with the currently still used CMOS circuits.
The approach of NEUROTEC II is that neuro-inspired paradigms and algorithms can be moved to a large extent into the hardware domain with the help of the memristive components. The synaptic weights in the neural network are not stored in the volatile or non-volatile memory as usual but are directly integrated as an artificial synapse consisting of a memristive cell with an adjustable resistance value in the artificial neural network between artificial neurons. The synaptic property here is enabled by the almost analog adjustability of the resistance values of the memristive cells. This type of computer architecture eliminates the separation of memory and processor of a von Neumann computer, which leads to large time and energy losses in conventional hardware.
The NEUROTEC II project is divided into six work packages (WP), one demonstrator project (DP) and four collaborative projects (K) with industrial partners:
- WP 1: Material development for memristive cells
- WP 2: Component integration and 3D studies
- WP 3: Simulation and modeling
- WP 4: Measurement and test technology for memristive electronics
- WP 5: Neuromorphic circuits
- WP 6: Hardware-software integration for neuromorphic systems
- DP: Demonstrator Project
K1: Experimentally based modeling and improvement of MOCVD system technology for 2D materials
- K2: Large area laser deposition of memristive oxides
- K3: Test environment for memristive architectures
- K4: Evaluation platform
The Chair of Electronic Devices (ELD) deals in work package 2.5 with the optimization of memristors based on 2D materials and the improvement of their reproducibility based on the results of the predecessor project NEUROTEC. Furthermore, alternative 2D materials are investigated for their suitability for memristors. The goals of the WP are the investigation and physical explanation of volatile and non-volatile switching processes in 2D materials as well as the optimization of the performance indices of the memristors, also regarding their integration on CMOS substrates. The close interconnection and collaboration of the project partners is demonstrated by ELD's cooperation with other WPs:
- WP 1.5 (CST) and WP 1.6 (PGI-10): Investigation of switching phenomena in 2D materials grown by metal organic chemical vapor deposition.
- WP 1.7 (GFE, ER-C): High resolution transmission electron microscopy to study 2D based memristors.
- WP 2.3 (IHT): Sharing results on multi-electrode devices to realize ultra-compact synaptic networks.
- WP 2.6 (AMO GmbH): Close cooperation for the development and evaluation of industry-relevant integration concepts for memristive devices based on 2D materials.
- WP 3.1 (PGI-7): Supply of experimental data on switching dynamics of memristive devices for verification of simulation models.
- DP 2 (IWE2): Testing of 2D memristor deposition on CMOS chips.
- K1 (AIXTRON SE): Delivery of typical requirements for the 2D materials considered as (potentially) memristive switching, exchange regarding process understanding and process optimization.
More information can be found on the project website www.neurotec.org.
NEUROTEC II is funded by the German Federal Ministry of Education and Research (BMBF).
RWTH Aachen University, Aachen,Germany
- Chair of Integrated Digital Systems and Circuit Design (IDS)
- Chair of Semiconductor Electronics and Institute of Semiconductor Electronics
- Chair of electronic devices
- Chair for Software for Systems on Silicon (SSS)
- Compound Semiconductor Technology (CST)
- Institute of Materials in Electrical Engineering 1 (IWE2)
- Central Facility for Electron Microscopy (GFE)
Forschungszentrum Jülich, Jülich, Germany
- Electronic Materials (PGI-7)
- JARA-Institute Energy-efficient information technology (Green IT) (PGI-10)
- Semiconductor Nanoelectronics (PGI-9)
- Neuromorphic Compute Nodes (PGI-14)
- Neuromorphic Software Eco Systems (PGI-15)
- Electronic Systems (ZEA-2)
AMO GmbH, Aachen, Germany
aixACCT Systems GmbH, Aachen, Germany
AIXTRON SE, Herzogenrath, Germany
SURFACE systems+technology GmbH & Co. KG, Hueckelhoven, Germany
AMOtronics UG, Aachen, Germany
Synopsys GmbH, Aachen, Germany
X-FAB Dresden GmbH & Co. KG, Dresden, Germany
Sympuls GmbH, Aachen,Germany